Essays on Logic Gate

REPORT NUMBER 6

‘State Machines and Code Generators’ The report presented is the sole work of the author. None of this report is plagiarised (in whole or part) from a fellow student's work, or from any un-referenced outside source.

PRACTICAL 6: STATE MACHINES AND CODE GENERATORS

AIM: INTRODUCTION: This laboratory is about the design, implementation, and testing of a state machine counter and a pulse train generator. The circuits will use JK flip-flops and logic gates to implement the necessary logic operation of the problem. The ICs used are the 7474 JK flip-flops and the 7400 NAND gates . The state machine counter has to follow a State Transition Diagram ...

REPORT NUMBER 3

PRACTICAL 3: LOGIC GATE CHARACTERISTICS The report presented is the sole work of the author. None of this report is plagiarised (in whole or part) from a fellow student's work, or from any un-referenced outside source. PRACTICAL 3: LOGIC GATE CHARACTERISTICS

AIM:

INTRODUCTION: This experiment is about the hardware implementation and analysis of the operation of TTL and CMOS logic gates. The type of logic gate tested in this experiment is the inverter. The TTL inverter logic gate is the 74LS04 Hex Inverter; the CMOS inverter logic gate is the 74C04 Hex Inverter . In the analysis part, the TTL and ...

REPORT NUMBER 2

The report presented is the sole work of the author.  None of this report is plagiarized (in whole or part) from a fellow student's work, or from any un-referenced outside source.

AIM:

The purpose of this experiment is to: Investigate the voltage switch over the points required for logic high or low levels. Prove experimentally different Boolean laws and logic theorems. Use different logic laws and theorems, to simply a combinatorial logic circuit. INTRODUCTION: This level detector circuit is based upon a LM311 Digital Comparator. This digital comparator is a device that produces an output level, either high or low ...